Rockchip pvtm device tree bindings
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The Process-Voltage-Temperature Monitor (PVTM) is used to monitor the chip
performance variance caused by chip process, voltage and temperature.


Required properties:
- compatible: Should be one of the following.
 - "rockchip,px30-pvtm" - for PX30 SoCs.
 - "rockchip,px30-pmu-pvtm" - for PX30 SoCs.
 - "rockchip,rk1808-pvtm" - for RK1808 SoCs.
 - "rockchip,rk1808-pmu-pvtm" - for RK1808 SoCs.
 - "rockchip,rk1808-npu-pvtm" - for RK1808 SoCs.
 - "rockchip,rk3288-pvtm" - for RK3288 SoCs.
 - "rockchip,rk3308-pvtm" - for RK3308 SoCs.
 - "rockchip,rk3308-pmu-pvtm" - for RK3308 SoCs.
 - "rockchip,rk3366-pvtm" - for RK3366 SoCs.
 - "rockchip,rk3366-pmu-pvtm" - for RK3366 SoCs.
 - "rockchip,rk3399-pvtm" - for RK3399 SoCs.
 - "rockchip,rk3399-pmu-pvtm" - for RK3399 SoCs.
- clocks: Must contain an entry for each entry in clock-names.
  See ../../clocks/clock-bindings.txt for details.
- clock-names: Should be "core_l", "core_b", "gpu", "ddr" and "pmu".
- resets: Must contain an entry for each entry in reset-names.
  See ../../reset/reset.txt for details.
- reset-names: Should be "core_l", "core_b", "gpu", "ddr" and "pmu".


Example:

grf: syscon@ff770000 {
	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
	reg = <0x0 0xff770000 0x0 0x10000>;
	#address-cells = <1>;
	#size-cells = <1>;

...

	pvtm: pvtm {
		compatible = "rockchip,rk3399-pvtm";
		clocks = <&cru SCLK_PVTM_CORE_L>, <&cru SCLK_PVTM_CORE_B>,
			 <&cru SCLK_PVTM_GPU>, <&cru SCLK_PVTM_DDR>;
		clock-names = "core_l", "core_b", "gpu", "ddr";
		resets = <&cru SRST_PVTM_CORE_L>, <&cru SRST_PVTM_CORE_B>,
			 <&cru SRST_PVTM_GPU>, <&cru SRST_PVTM_DDR>;
		reset-names = "core_l", "core_b", "gpu", "ddr";
	};
}
